The invention relates to measuring a characteristic of an integrated circuit.
Referring to FIG. 1, an integrated circuit (a microprocessor, for example) typically is fabricated on a die 10 of a silicon wafer. Before the die is encased with a packaging encapsulant, the integrated circuit may be tested. In this manner, a conventional technique for testing the integrated circuit may include placing a test probe 14 on a test pad 16 of the circuit and observing some electrical characteristic (a voltage or a current, for example) of the integrated circuit on a tester 12, for example, to evaluate the circuit""s performance.
Unfortunately, the probe 14 may introduce an electrical load on the integrated circuit, and this load may change the operating conditions of the integrated circuit. Thus, the signal that is measured by the probe 14 may not be accurate. Furthermore, the above-described probing technique may not be efficient because of the length of preparation time that may be needed, and the technique may require a sophisticated probing skill. Therefore, the success rate and testing throughput of this technique may be very low.
Thus, there is a continuing need for an arrangement that addresses one or more of the problems that are stated above.